1. Technical Field
The present invention relates to field-effect transistors in general, and in particular to topological insulator-based field-effect transistors.
2. Description of Related Art
For a metal-oxide-semiconductor field-effect transistor (MOSFET), the gate controls an electrical current flow between the source and drain by controlling the height of the conduction channel in energy below a threshold or through self-consistent electrostatics (i.e., the number of charge carriers within the channel above the threshold). Threshold is a point of switching between an ON state and an OFF state for a transistor. Above threshold in modem short channel devices (i.e., channel lengths of a few tens of nanometers), the injection efficiency of charge carriers into the channel is approaching the ideal of unity; only backscattering of some of the carriers to the source due to channel-to-gate-dielectric surface roughness, scattering from charged impurities or interaction with the vibrational modes of the semiconductor and/or dielectric within the channel reduces this injection efficiency by a factor of approximately two or less. Thus, ON-state currents can be quite large. However, the switching between the ON and OFF states is not entirely abrupt. At best, in a limit that can only be closely approached below threshold, the current can be reduced only by one factor of 10 (i.e., by one order of magnitude or, equivalently, by one decade) for every 2.3 kBT/q (i.e., natural log of 10 times Boltzmann's constant times temperature in degrees Kelvin, all divided by the magnitude of the charge of an electron), which is 60 mV at approximately room temperature (approximately 300 K). This limit is the result of “thermionic emission” of energetic charge carriers from the high energy tail of the carrier energy distribution in the source into the channel. The thermionically-emitted charge carriers represent a critical leakage path for MOSFETs in the OFF state within complementary metal-oxide semiconductor (CMOS) logic. Thermionic emission is a basic physical mechanism of transport in a MOSFET and cannot be eliminated by changing conduction channel materials or providing better gate control over the channel barrier height. Even if each MOSFET can be built atom-by-atom exactly as desired, the 2.3 kBT/q per decade change in current flow below threshold will still represent the best switching behavior possible for a MOSFET.
CMOS logic circuits are designed such that in any logic state under steady-state conditions, there is always at least one OFF-state transistor in series between the supply voltage and ground, so that only OFF-state leakage currents flow under steady-state conditions. Large currents flow only during switching transients, as required to quickly charge the gates of subsequent transistors and interconnects. However, in order to minimize power consumption in CMOS logic where transistors are only switching for a very small fraction of the time on average, transistor ON-OFF current ratios of multiple orders of magnitude (multiple factors of ten) still must be achieved to control the OFF-state power consumption. In order to achieve these ratios subject to the optimal 2.3 kBT/q per decade switching and to provide enough ON-state current for switching, an approximately half a volt change in the gate voltage between the ON and OFF states would be required under normal operating conditions—where the actual change possible in a CMOS circuit is defined by the power supply voltage—a lower limit that should be reached somewhere around the end of the next decade. However, the energy consumed during switching varies as the square of the supply voltage. Thus, historically, as device density increased in logic circuits, not only device dimensions have been reduced, but also supply voltages. Therefore, the inability to further scale supply voltages beyond this point represents a major roadblock to the continued improvement in the computational capabilities and energy efficiency of future logic circuits that employ MOSFETs. Consequently, it would be desirable to provide a new type of transistor capable of having substantially improved performance within this voltage limit, overcoming this voltage limit, or both.